Chip packaging is often intensely involved with heat removal. Thermal expansion-mismatch challenges exist between the die, the underfill material, and the substrate to which the die is mounted and to connecting structures such as the motherboard. The thermal mismatch often is exhibited at the joint of a solder bump and its bond pad.
One method of dealing with solder bump stress on a motherboard is to encapsulate the solder bumps at the corners with an underfill layer. This method only encapsulates solder bumps at the periphery of the package. It does not encapsulate the solder bumps at the center.
Future packaging technology especially in the chipset application, will drive finer pitch as package size shrinks. With miniaturization of pitch, smaller ball size poses an increasing challenge to solder joint performance.